Data SheetHMC903LP3ESPECIFICATIONS TA = 25°C, VDD1 = VDD2 = 3.5 V, IDQ = 80 mA (VGG1 = VGG2 = open for normal, self biased operation), unless otherwise noted. 6 GHz TO 16 GHz FREQUENCY RANGETable 1. ParameterMinTypMaxUnit GAIN 16.5 18.5 dB Gain Variation over Temperature 0.012 dB/°C NOISE FIGURE1 1.7 2.2 dB RETURN LOSS Input 12 dB Output 12 dB OUTPUT POWER For 1 dB Compression (P1dB)1 13 14.5 dBm Saturated (P )1 16.5 dBm SAT OUTPUT THIRD-ORDER INTERCEPT (IP3) 22 25 dBm SUPPLY CURRENT (I ) 80 110 mA DQ 1 Board loss removed from gain, power, and noise figure measurements. 16 GHz TO 17 GHz FREQUENCY RANGETable 2. ParameterMinTypMaxUnit GAIN 15 18 dB Gain Variation over Temperature 0.012 dB/°C NOISE FIGURE1 2.2 2.5 dB RETURN LOSS Input 11 dB Output 14 dB OUTPUT POWER For 1 dB Compression (P1dB)1 12 13 dBm Saturated (P )1 16.5 dBm SAT OUTPUT THIRD-ORDER INTERCEPT (IP3) 22 25 dBm SUPPLY CURRENT (I ) 80 110 mA DQ 1 Board loss removed from gain, power, and noise figure measurements. Rev. I | Page 3 of 13 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications 6 GHz to 16 GHz Frequency Range 16 GHz to 17 GHz Frequency Range Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Theory of Operation Applications Information Recommended Bias Sequence During Power Up Recommended Bias Sequence During Power Down Evaluation PCB Typical Application Circuits Outline Dimensions Ordering Guide