AD8325VIN–0VIN+0HPF_0TP21DNI � R200AGNDR21DNIAGNDCABLE_05R10DNITP22DNICBL10–18621TP20DNISECR18DNI93R19DNIAGNDT3HPPCOMAGND � R9043PRITOKO1R22DNILPPCX6002AGND1321DNISECR17DNIT4ETC145PRIR16DNI � R140 � � R80R150TP23TP24R7DNIDNI = DO NOT INSTALL � � R13R6051.1AGND621AGNDR11DNIR12DNISECFT1FAGND � � C1543TOKO1PRIC160.10.1TP19DNI321TP10TP11TP12AGNDSECDNIT2ETC145PRIAGNDFTB1 � F � TP18DNIC9C70.10.1CCFVCC � DEVICE = 2LUGPWRVC110.1FTP16DNITP9 � FC1210 � F � C80.1C10AGND0.1R4DNIAGNDTP13DNITP17DNIPKG_TYPE = R1206R5DNITP15DNI2827262524232221201918171615CCIN–IN+CCCCCCTP14DNIGNDVVVGNDVGNDBYPVVGNDGNDGNDOUT+Z1AGNDTSSOP28DATENCCCCCCSDATACLKGNDVTXENSLEEPGNDVVGNDGNDGNDOUT–1234567891920212223242526272829303132333435361011121314P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1TP6C51000pFC6DNIC4DNI � R20TP2TP4TP8 � R10 � R3TP10TP5AGNDTP3TP7FFF � � � 123456789C1C2C31011121314151617180.10.10.1AGNDP1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1P1CLKDATENSDATATXENSLEEP Figure 12. Evaluation Board Schematic REV. A –15– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS LOGIC INPUTS TIMING REQUIREMENTS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDERING GUIDE PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics APPLICATIONS General Application Operational Description SPI Programming and Gain Adjustment Input Bias, Impedance, and Termination Output Bias, Impedance, and Termination Power Supply Decoupling, Grounding, and Layout Considerations Initial Power-Up Between Burst Operation Distortion, Adjacent Channel Power, and DOCSIS Noise and DOCSIS Evaluation Board Features and Operation Overshoot on PC Printer Ports Transformer and Diplexer Differential Inputs Single-Ended-to-Differential Input Differential Input Installing the Visual Basic Control Software Running the Software Controlling the Gain/Attenuation of the AD8325 Transmit Enable, Transmit Disable, and Sleep Memory Section EVALUATION BOARD FEATURES AND OPERATION EVALUATION BOARD BILL OF MATERIALS OUTLINE DIMENSIONS Revision History