Preliminary Datasheet EPC23102 (Efficient Power Conversion) - 4

eGaN® FET DATASHEET
EPC23102
Electrical Characteristics
Nominal VIN = 48 V, VDRV = VDD = 5 V and (VBOOT – VPHASE) = 5 V. All typical ratings are specified at TA = 25˚C unless otherwise indicated. All voltage parameters are absolute voltages referenced to PGND (= AGND) unless indicated otherwise.
Electrical Characteristics SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Low Side Power Supply
IDRV_Q Off State Total Quiescent Current HSIN/LSIN/EN = 0 V, VDRV = VDD = 5 V 10 IDRV_100kHz Total Operating Current @100 kHz PWM = 100 kHz, 50% On-Time 18 mA IDRV_1MHz Total Operating Current @1 MHz PWM = 1 MHz, 50% On-Time 37 IVIN_disable VIN Quiescent Current at Disable Mode EN = VDRV = 5 V, VIN = 48 V 600 µA IDRV_disable VDRV Quiescent Current at Disable Mode EN = VDRV = 5 V, VIN = 48 V 50
Bootstrap Power Supply
IBOOT_Q Off State Bootstrap Supply Current HSIN = 0 V, (VBOOT – VPHASE) = 5 V 6 IBOOT_100kHz Bootstrap Supply Current @100 kHz HS PWM = 100 kHz, 50% On-Time 8 mA IBOOT_1MHz Bootstrap Supply Current @1 MHz HS PWM = 1 MHz, 50% On-Time 20 VSYNC_BOOT Sync Boot Generated (VBOOT -VPHASE) ISYNC_BOOT = 20 mA 4.75 V
Power On Reset and Undervoltage Lockout
VDD_POR+ POR Trip Level VDD Rising LSIN = 5 V, VDD Ramps Up 4.0 VDD_POR_HYST POR VDD Falling Hysteresis LSIN = 5 V, VDD Ramps Down 0.5 V VBOOT_UVLO+ UVLO Trip Level (VBOOT - VPHASE) Rising HSIN = 5 V, VBOOT Ramps Up 4.0 VBOOT_UVLO_HYST UVLO (VBOOT - VPHASE) Falling Hysteresis HSIN = 5 V, VBOOT Ramps Down 0.5
Logic Input Pins
VIH High-level Logic Threshold HSIN, LSIN Rising 2.4 VIL Low-level Logic Threshold HS V IN, LSIN Falling 0.8 VIHYST Logic Threshold Hysteresis VIH Rising – VIL Falling 0.3 RIN HSIN and LSIN Pull-Down Resistance HSIN, LSIN = 5 V 6.5 kΩ
VDD Disable Input
VTH_EN EN Input Threshold VDRV = 5 V 3.3 V REN EN Pul -Down Resistance EN = 5 V 150 kΩ
High Side Internal Power FET
RDS(on)_HS High Side FET RDS(on) IDS = +/-10 A, HSIN = 5 V, LSIN = 0 V 5.2 6.6 mΩ VHS_DS_Clamp High Side 3rd Quadrant Clamp IDS = - 10 A, HSIN & LSIN = 0 V -1.5 V ILEAK_VIN-SW Leakage Current (VIN to SW) HSIN = 0 V, VIN = 100 V, SW = 0 V 100 µA CWELL HV-Well Capacitance (SW to PGND) HSIN = 0 V, VIN = 48 V, SW = 48 V 61 pF COSS_HSFET Output Capacitance (VIN to SW) HSIN = 0 V, VIN = 48 V, SW = 0 V 342 QOSS_HSFET Output Charge (VIN to SW) HSIN = 0 V, VIN = 48 V, SW = 0 V 28 nC EQOSS_HSFET Output Capacitance Stored Energy HSIN = 0 V, VIN = 48 V, SW = 0 V 0.5 EON_HS_0 HS Turn-On, SW = 0 V to 48 V, R Turn-On Switching Energy (HS_FET) BOOT = 0 Ω, ILOAD = 10 A 2.5 µJ EON_HS_1 HS Turn-On, SW = 0 V to 48 V, RBOOT = 2.2 Ω, ILOAD = 10 A 4.5 EOFF_HS Turn-Off Switching Energy (HS_FET) HS Turn-Off, SW = 48 V to 0 V, ILOAD = 10 A 0.15
Low Side Internal Power FET
RDS(on)_HS Low Side FET RDS(on) IDS = +/-10 A, LSIN = 5 V, HSIN = 0 V 5.2 6.6 mΩ VHS_DS_Clamp Low Side 3rd Quadrant Clamp IDS = - 10 A, HSIN & LSIN = 0 V -1.5 V ILEAK_SW-PGND Leakage Current (SW to PGND) LSIN = 0 V, VIN = 100 V, SW = 100 V 100 µA COSS_LSFET Output Capacitance (SW to PGND) LSIN = 0 V, SW = 48 V, PGND = 0 V 343 pF QOSS_LSFET Output Charge (SW to PGND) LSIN = 0 V, SW = 48 V, PGND = 0 V 29 nC EQOSS_LSFET Output Capacitance Stored Energy LSIN = 0 V, SW = 48 V, PGND = 0 V 0.53 EON_LS_0 LS Turn-On, SW = 48 V to 0 V, R Turn-On Switching Energy (LS_FET) BOOT = 0 Ω, ILOAD = 10 A 2.5 µJ EON_LS_1 LS Turn-On, SW = 48 V to 0 V, RBOOT = 2.2 Ω, ILOAD = 10 A 4.5 EOFF_LS Turn-Off Switching Energy (LS_FET) LS Turn-Off, SW = 0 V to 48 V, ILOAD = 10 A 0.15 EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2022 | | 4