Datasheet OPA205, OPA2205, OPA4205 (Texas Instruments) - 10
| 制造商 | Texas Instruments |
| 描述 | Dual, rail-to-rail bipolar precision e-trim op amp with low input bias current and low noise |
| 页数 / 页 | 47 / 10 — OPA205, OP. A2205, OP. A4205. www.ti.com. 6.8 Electrical Characteristics: … |
| 文件格式/大小 | PDF / 3.0 Mb |
| 文件语言 | 英语 |
OPA205, OP. A2205, OP. A4205. www.ti.com. 6.8 Electrical Characteristics: VS = ±15 V. PARAMETER. TEST CONDITIONS. MIN. TYP. MAX. UNIT
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文件文字版本
OPA205, OP A2205, OP A4205
SBOS962F – APRIL 2020 – REVISED MARCH 2023
www.ti.com 6.8 Electrical Characteristics: VS = ±15 V
at TA = 25°C, VCM = VOUT = midsupply, and RL = 10 kΩ connected to VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OFFSET VOLTAGE
±2 ±15 OPA2205 TA = –40°C to +125°C ±25 VOS Input offset voltage μV ±4 ±25 OPAx205A TA = –40°C to +125°C ±55 OPA2205 TA = –40°C to +125°C ±0.04 ±0.2 dVOS/dT Input offset voltage drift μV/°C OPAx205A TA = –40°C to +125°C ±0.08 ±0.5 OPA2205, ±0.05 ±0.25 V Power supply rejection S = ±2.25 V to ±18 V TA = –40°C to +125°C ±0.5 PSRR μV/V ratio OPAx205A, ±0.05 ±0.5 VS = ±2.25 V to ±18 V TA = –40°C to +125°C ±1 Channel separation, f = dc 130 dB (dual, quad) f = 100 kHz 110
INPUT BIAS CURRENT
±0.1 ±0.4 OPA2205 TA = 0°C to 85°C ±0.6 TA = –40°C to +125°C ±0.9 IB Input bias current nA ±0.1 ±0.5 OPAx205A TA = 0°C to 85°C ±1 TA = –40°C to +125°C ±1.2 ±0.1 ±0.4 IOS Input offset current TA = 0°C to 85°C ±0.8 nA TA = –40°C to +125°C ±0.9
NOISE
Input voltage noise f = 0.1 Hz to 10 Hz 0.2 μVPP f = 10 Hz 7.4 Input voltage noise en f = 100 Hz 7.2 nV/√Hz density f = 1 kHz 7.2 Input current noise in f = 1 kHz 110 fA/√Hz density
INPUT VOLTAGE
VCM Common-mode voltage (V–) + 1 (V+) – 1.4 V OPA2205, 126 140 (V–) + 1 V < V Common-mode rejection CM < (V+) – 1.4 V TA = –40°C to +125°C 124 140 CMRR dB ratio OPAx205A, 126 140 (V–) + 1 V < VCM < (V+) – 1.4 V TA = –40°C to +125°C 124 140
INPUT IMPEDANCE
ZID Differential 9 || 4.4 MΩ || pF ZICM Common-mode 300 || 4.3 GΩ || pF 10 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: OPA205 OPA2205 OPA4205 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information: OPA205 6.5 Thermal Information: OPA2205 6.6 Thermal Information: OPA4205 6.7 Electrical Characteristics: VS = ±5 V 6.8 Electrical Characteristics: VS = ±15 V 6.9 Typical Characteristics 7 Parameter Measurement Information 7.1 Typical Specifications and Distributions 8 Detailed Description 8.1 Overview 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Input Offset Trimming 8.3.2 Lower Input Bias With Super-Beta Inputs 8.3.3 Overload Power Limiter 8.3.4 EMI Rejection 8.4 Device Functional Modes 9 Application and Implementation 9.1 Application Information 9.2 Typical Applications 9.2.1 High-Precision Signal-Chain Input Buffer 9.2.1.1 Design Requirements 9.2.1.2 Detailed Design Procedure 9.2.1.3 Application Curves 9.2.2 Discrete, Two-Op-Amp Instrumentation Amplifier 9.2.3 Second-Order Low-Pass Filter 9.3 Power Supply Recommendations 9.4 Layout 9.4.1 Layout Guidelines 9.4.2 Layout Example 10 Device and Documentation Support 10.1 Device Support 10.1.1 Development Support 10.1.1.1 PSpice® for TI 10.2 Documentation Support 10.2.1 Related Documentation 10.3 Receiving Notification of Documentation Updates 10.4 Support Resources 10.5 Trademarks 10.6 Electrostatic Discharge Caution 10.7 Glossary 11 Mechanical, Packaging, and Orderable Information
SBOS962F – APRIL 2020 – REVISED MARCH 2023
www.ti.com 6.8 Electrical Characteristics: VS = ±15 V
at TA = 25°C, VCM = VOUT = midsupply, and RL = 10 kΩ connected to VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OFFSET VOLTAGE
±2 ±15 OPA2205 TA = –40°C to +125°C ±25 VOS Input offset voltage μV ±4 ±25 OPAx205A TA = –40°C to +125°C ±55 OPA2205 TA = –40°C to +125°C ±0.04 ±0.2 dVOS/dT Input offset voltage drift μV/°C OPAx205A TA = –40°C to +125°C ±0.08 ±0.5 OPA2205, ±0.05 ±0.25 V Power supply rejection S = ±2.25 V to ±18 V TA = –40°C to +125°C ±0.5 PSRR μV/V ratio OPAx205A, ±0.05 ±0.5 VS = ±2.25 V to ±18 V TA = –40°C to +125°C ±1 Channel separation, f = dc 130 dB (dual, quad) f = 100 kHz 110
INPUT BIAS CURRENT
±0.1 ±0.4 OPA2205 TA = 0°C to 85°C ±0.6 TA = –40°C to +125°C ±0.9 IB Input bias current nA ±0.1 ±0.5 OPAx205A TA = 0°C to 85°C ±1 TA = –40°C to +125°C ±1.2 ±0.1 ±0.4 IOS Input offset current TA = 0°C to 85°C ±0.8 nA TA = –40°C to +125°C ±0.9
NOISE
Input voltage noise f = 0.1 Hz to 10 Hz 0.2 μVPP f = 10 Hz 7.4 Input voltage noise en f = 100 Hz 7.2 nV/√Hz density f = 1 kHz 7.2 Input current noise in f = 1 kHz 110 fA/√Hz density
INPUT VOLTAGE
VCM Common-mode voltage (V–) + 1 (V+) – 1.4 V OPA2205, 126 140 (V–) + 1 V < V Common-mode rejection CM < (V+) – 1.4 V TA = –40°C to +125°C 124 140 CMRR dB ratio OPAx205A, 126 140 (V–) + 1 V < VCM < (V+) – 1.4 V TA = –40°C to +125°C 124 140
INPUT IMPEDANCE
ZID Differential 9 || 4.4 MΩ || pF ZICM Common-mode 300 || 4.3 GΩ || pF 10 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: OPA205 OPA2205 OPA4205 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information: OPA205 6.5 Thermal Information: OPA2205 6.6 Thermal Information: OPA4205 6.7 Electrical Characteristics: VS = ±5 V 6.8 Electrical Characteristics: VS = ±15 V 6.9 Typical Characteristics 7 Parameter Measurement Information 7.1 Typical Specifications and Distributions 8 Detailed Description 8.1 Overview 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Input Offset Trimming 8.3.2 Lower Input Bias With Super-Beta Inputs 8.3.3 Overload Power Limiter 8.3.4 EMI Rejection 8.4 Device Functional Modes 9 Application and Implementation 9.1 Application Information 9.2 Typical Applications 9.2.1 High-Precision Signal-Chain Input Buffer 9.2.1.1 Design Requirements 9.2.1.2 Detailed Design Procedure 9.2.1.3 Application Curves 9.2.2 Discrete, Two-Op-Amp Instrumentation Amplifier 9.2.3 Second-Order Low-Pass Filter 9.3 Power Supply Recommendations 9.4 Layout 9.4.1 Layout Guidelines 9.4.2 Layout Example 10 Device and Documentation Support 10.1 Device Support 10.1.1 Development Support 10.1.1.1 PSpice® for TI 10.2 Documentation Support 10.2.1 Related Documentation 10.3 Receiving Notification of Documentation Updates 10.4 Support Resources 10.5 Trademarks 10.6 Electrostatic Discharge Caution 10.7 Glossary 11 Mechanical, Packaging, and Orderable Information