Datasheet OPA205, OPA2205, OPA4205 (Texas Instruments) - 2
制造商 | Texas Instruments |
描述 | Dual, rail-to-rail bipolar precision e-trim op amp with low input bias current and low noise |
页数 / 页 | 47 / 2 — OPA205, OP. A2205, OP. A4205. www.ti.com. Table of Contents. 1 Features. … |
文件格式/大小 | PDF / 3.0 Mb |
文件语言 | 英语 |
OPA205, OP. A2205, OP. A4205. www.ti.com. Table of Contents. 1 Features. 2 Applications. 3 Description. 4 Revision History

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OPA205, OP A2205, OP A4205
SBOS962F – APRIL 2020 – REVISED MARCH 2023
www.ti.com Table of Contents 1 Features
..1 8.2 Functional Block Diagram... 22
2 Applications
... 1 8.3 Feature Description...23
3 Description
...1 8.4 Device Functional Modes..24
4 Revision History
.. 2
9 Application and Implementation
.. 25
5 Pin Configuration and Functions
...4 9.1 Application Information... 25
6 Specifications
.. 6 9.2 Typical Applications.. 25 6.1 Absolute Maximum Ratings.. 6 9.3 Power Supply Recommendations...28 6.2 ESD Ratings .. 6 9.4 Layout... 28 6.3 Recommended Operating Conditions...6
10 Device and Documentation Support
..30 6.4 Thermal Information: OPA205.. 7 10.1 Device Support... 30 6.5 Thermal Information: OPA2205.. 7 10.2 Documentation Support.. 30 6.6 Thermal Information: OPA4205.. 7 10.3 Receiving Notification of Documentation Updates..30 6.7 Electrical Characteristics: VS = ±5 V...8 10.4 Support Resources... 30 6.8 Electrical Characteristics: VS = ±15 V...10 10.5 Trademarks...30 6.9 Typical Characteristics.. 12 10.6 Electrostatic Discharge Caution..30
7 Parameter Measurement Information
.. 21 10.7 Glossary..30 7.1 Typical Specifications and Distributions..21
11 Mechanical, Packaging, and Orderable 8 Detailed Description
..22
Information
.. 30 8.1 Overview... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (December 2022) to Revision F (March 2023) Page
• Changed title to align with standard-grade device specifications... 1 • Added OPA2205 D (SOIC, 8) package and associated content as production data..1 • Added OPA4205 D (SOIC, 14) package and associated content as production data..1 • Changed maximum input bias from ±0.4 nA to ±0.5 nA... 21 • Changed offset and offset drift values to match standard-grade device specifications in Detailed Design Description ...26 • Changed Figure 9-6 to show correct VS+ connection ... 29
Changes from Revision D (September 2022) to Revision E (December 2022) Page
• Added OPA4205 TSSOP package and associated content as production data.. 1 • Changed typical input offset voltage from 8 µV to 4 µV in Electrical Characteristics ...8 • Changed maximum input offset voltage from 50 µV to 25 µV in Electrical Characteristics ... 8 • Changed maximum input offset voltage over temperature from 80 µV to 55 µV in Electrical Characteristics ... ..8 • Changed typical input offset voltage from 8 µV to 4 µV in Electrical Characteristics ...10 • Changed maximum input offset voltage from 50 µV to 25 µV in Electrical Characteristics ... 10 • Changed maximum input offset voltage over temperature from 80 µV to 55 µV in Electrical Characteristics ... ..10
Changes from Revision C (July 2022) to Revision D (September 2022) Page
• Changed OPA205 (SOIC) from preview to production data (active).. 1
Changes from Revision B (August 2021) to Revision C (July 2022) Page
• Added OPA205 D (SOIC) package as advanced information (preview).. 1
Changes from Revision A (May 2021) to Revision B (August 2021) Page
• Changed Figure 6-22, Voltage Noise Density vs Frequency, to show voltage noise density instead of current noise density...12 2 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: OPA205 OPA2205 OPA4205 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information: OPA205 6.5 Thermal Information: OPA2205 6.6 Thermal Information: OPA4205 6.7 Electrical Characteristics: VS = ±5 V 6.8 Electrical Characteristics: VS = ±15 V 6.9 Typical Characteristics 7 Parameter Measurement Information 7.1 Typical Specifications and Distributions 8 Detailed Description 8.1 Overview 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Input Offset Trimming 8.3.2 Lower Input Bias With Super-Beta Inputs 8.3.3 Overload Power Limiter 8.3.4 EMI Rejection 8.4 Device Functional Modes 9 Application and Implementation 9.1 Application Information 9.2 Typical Applications 9.2.1 High-Precision Signal-Chain Input Buffer 9.2.1.1 Design Requirements 9.2.1.2 Detailed Design Procedure 9.2.1.3 Application Curves 9.2.2 Discrete, Two-Op-Amp Instrumentation Amplifier 9.2.3 Second-Order Low-Pass Filter 9.3 Power Supply Recommendations 9.4 Layout 9.4.1 Layout Guidelines 9.4.2 Layout Example 10 Device and Documentation Support 10.1 Device Support 10.1.1 Development Support 10.1.1.1 PSpice® for TI 10.2 Documentation Support 10.2.1 Related Documentation 10.3 Receiving Notification of Documentation Updates 10.4 Support Resources 10.5 Trademarks 10.6 Electrostatic Discharge Caution 10.7 Glossary 11 Mechanical, Packaging, and Orderable Information