Datasheet OPA205, OPA2205, OPA4205 (Texas Instruments)

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OPA205 , OPA2205 , OPA4205
SBOS962F – APRIL 2020 – REVISED MARCH 2023
OPAx205 4-µV, 0.08-µV/°C, Low-Power, Super Beta, Bipolar, e-trim™ Op Amps 1 Features 3 Description
• e-trim™ operational amplifier performance The OPA205, OPA2205, and OPA4205 (OPAx205) – Low offset voltage: 25 µV (max), are the next generation of the industry-standard 15 µV (max, high grade) OPAx277 family. The OPA206 and OPA2206 are – Low offset voltage drift: ±0.5 µV/°C (max), related devices with the same op-amp core, but with ±0.2 µV/°C (max, high grade) the added feature of input overvoltage protection • Super beta inputs ±40 V above the supplies. These devices are – Input bias current: 500 pA (max) precision, bipolar e-trim™ op amps with super-beta – Input current noise: 110 fA/√Hz inputs. TI's proprietary trimming technology is used to • Low noise achieve a typical input offset voltage of ±4 µV (±2 µV, – 0.1 to 10-Hz: 0.2 µV high grade), and a typical input offset voltage drift of PP – Voltage noise: 7.2 nV/√Hz ±0.08 µV (±0.04 µV, high grade). • AOL, CMRR, and PSRR: > 126 dB (full Designed on a bipolar process, the OPAx205 provide temperature range) 3.6‑MHz gain bandwidth for a mere 220 µA of • Gain bandwidth product: 3.6 MHz quiescent current. The devices also achieve a low • Low quiescent current: 240 µA (max) voltage noise density of only 7.2 nV/√Hz at 1 kHz. • Slew rate: 4 V/µs The super-beta inputs of the OPAx205 have a very • Overload power limiter low input bias current of 100 pA (typical) and a current • Rail-to-rail output noise density of 110 fA/√Hz. • EMI and RFI filtered inputs • Wide supply: 4.5 V to 36 V The high performance of the OPAx205 makes these • Temperature range: –40°C to +125°C devices an excellent choice for systems requiring • Available in standard grade (OPAx205A) and high precision and low power consumption, such high grade (OPA2205, preview) as flow and pressure transmitters, portable data • Available with ±40-V overvoltage protection in the acquisition (DAQ) systems, and high-density source OPA206 and OPA2206 measurement units (SMU).
2 Applications Device Information PART NUMBER CHANNELS PACKAGE
(1) • Flow transmitter OPA205 Single D (SOIC, 8) • String inverter • Data acquisition (DAQ) Dual D (SOIC, 8) OPA2205(2) • Source measurement unit (SMU) Dual DGK (VSSOP, 8) • Lab and field instrumentation Quad D (SOIC, 14) OPA4205 • Battery test Quad PW (TSSOP, 14) • Analog input module • Pressure transmitter (1) For all available packages, see the package option addendum at the end of the data sheet. (2) High-grade version is preview (not Production Data). 15 750 470 pF 12 +7 V ± 2.4 k 3 k 9 IN+ +
OPA2205
+7 V 100 í7 V ± ifiers (%) 1.1 nF 1 nF V 100 OUT 6 +
THP210
Ampl +7 V ± 2.4 k 3 k í7 V 3 INí +
OPA2205
470 pF í7 V 750 0 -0.1 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.1 Offset Voltage Drift (µV/°C)
OPA2205 Typical Application OPAx205 Offset Voltage Drift
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA. Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information: OPA205 6.5 Thermal Information: OPA2205 6.6 Thermal Information: OPA4205 6.7 Electrical Characteristics: VS = ±5 V 6.8 Electrical Characteristics: VS = ±15 V 6.9 Typical Characteristics 7 Parameter Measurement Information 7.1 Typical Specifications and Distributions 8 Detailed Description 8.1 Overview 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Input Offset Trimming 8.3.2 Lower Input Bias With Super-Beta Inputs 8.3.3 Overload Power Limiter 8.3.4 EMI Rejection 8.4 Device Functional Modes 9 Application and Implementation 9.1 Application Information 9.2 Typical Applications 9.2.1 High-Precision Signal-Chain Input Buffer 9.2.1.1 Design Requirements 9.2.1.2 Detailed Design Procedure 9.2.1.3 Application Curves 9.2.2 Discrete, Two-Op-Amp Instrumentation Amplifier 9.2.3 Second-Order Low-Pass Filter 9.3 Power Supply Recommendations 9.4 Layout 9.4.1 Layout Guidelines 9.4.2 Layout Example 10 Device and Documentation Support 10.1 Device Support 10.1.1 Development Support 10.1.1.1 PSpice® for TI 10.2 Documentation Support 10.2.1 Related Documentation 10.3 Receiving Notification of Documentation Updates 10.4 Support Resources 10.5 Trademarks 10.6 Electrostatic Discharge Caution 10.7 Glossary 11 Mechanical, Packaging, and Orderable Information