Datasheet 2N3906, MMBT3906, PZT3906 (Fairchild) - 9
| 制造商 | Fairchild |
| 描述 | PNP General-Purpose Amplifier |
| 页数 / 页 | 11 / 9 — 2N3906 / MMBT3906 / PZT3906 — PNP General-Purpose Amplifier Physical … |
| 文件格式/大小 | PDF / 315 Kb |
| 文件语言 | 英语 |
2N3906 / MMBT3906 / PZT3906 — PNP General-Purpose Amplifier Physical Dimensions (Continued) SOT-23. 0.95 2.92±0.20. 3 1.40
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2N3906 / MMBT3906 / PZT3906 — PNP General-Purpose Amplifier Physical Dimensions (Continued) SOT-23
0.95 2.92±0.20
3 1.40
1.30+0.20
-0.15 1
(0.29) 2 0.95
1.90 2.20 0.60
0.37
0.20 A B 1.90 1.00 LAND PATTERN
RECOMMENDATION
SEE DETAIL A 1.20 MAX 0.10
0.00 (0.93) 0.10 C C 2.40±0.30 NOTES: UNLESS OTHERWISE SPECIFIED GAGE PLANE
0.23
0.08 A) REFERENCE JEDEC REGISTRATION
TO-236, VARIATION AB, ISSUE H.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE INCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR EXTRUSIONS.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M -1994.
E) DRAWING FILE NAME: MA03DREV10 0.25 0.20 MIN
(0.55) SEATING
PLANE SCALE: 2X Figure 18. 3-LEAD, SOT23, JEDEC TO-236, LOW PROFILE
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MA/MA03D.pdf.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packing_dwg/PKG-MA03D.pdf. © 2010 Fairchild Semiconductor Corporation
2N3906 / MMBT3906 / PZT3906 Rev. 1.2.2 www.fairchildsemi.com
9
0.95 2.92±0.20
3 1.40
1.30+0.20
-0.15 1
(0.29) 2 0.95
1.90 2.20 0.60
0.37
0.20 A B 1.90 1.00 LAND PATTERN
RECOMMENDATION
SEE DETAIL A 1.20 MAX 0.10
0.00 (0.93) 0.10 C C 2.40±0.30 NOTES: UNLESS OTHERWISE SPECIFIED GAGE PLANE
0.23
0.08 A) REFERENCE JEDEC REGISTRATION
TO-236, VARIATION AB, ISSUE H.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE INCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR EXTRUSIONS.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M -1994.
E) DRAWING FILE NAME: MA03DREV10 0.25 0.20 MIN
(0.55) SEATING
PLANE SCALE: 2X Figure 18. 3-LEAD, SOT23, JEDEC TO-236, LOW PROFILE
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MA/MA03D.pdf.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packing_dwg/PKG-MA03D.pdf. © 2010 Fairchild Semiconductor Corporation
2N3906 / MMBT3906 / PZT3906 Rev. 1.2.2 www.fairchildsemi.com
9