AD9652* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017COMPARABLE PARTSDESIGN RESOURCES View a parametric search of comparable parts. • ad9652 Material Declaration • PCN-PDN Information EVALUATION KITS • Quality And Reliability • AD-FMCOMMS6-EBZ Evaluation Board • Symbols and Footprints • AD9652 Evaluation Board DISCUSSIONSDOCUMENTATION View all ad9652 EngineerZone Discussions. Data Sheet • AD9652: 16-Bit, 310 MSPS, 3.3 V/1.8 V Dual Analog-to- SAMPLE AND BUY Digital Converter (ADC) Data Sheet Visit the product page to see pricing options. REFERENCE MATERIALSTECHNICAL SUPPORTPress Submit a technical question or find your regional support • Analog Devices Unveils a 16-Bit, 310 MSPS, Dual A/D number. Converter Providing Industry-leading Noise and Linearity Performance Over a Wide Input Range DOCUMENT FEEDBACK Submit feedback for this data sheet. This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified. Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications ADC DC Specifications ADC AC Specifications Digital Specifications Switching Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Characteristics ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Equivalent Circuits Theory of Operation ADC Architecture Analog Input Considerations Input Common Mode Common-Mode Voltage Servo Dither Large Signal Fast Fourier Transform Small Signal FFT Static Linearity Differential Input Configurations Voltage Reference Internal Reference Connection External Reference Operation Clock Input Considerations Clock Input Options Input Clock Divider Clock Duty Cycle Jitter Considerations Power Dissipation and Standby Mode Internal Background Calibration Digital Outputs Timing Data Clock Output ADC Overrange Fast Threshold Detection (FDA/FDB) Serial Port Interface Configuration Using the SPI Hardware Interface Configuration Without the SPI SPI Accessible Features Memory Map Reading the Memory Map Register Table Open and Reserved Locations Default Values Logic Levels Transfer Register Map Channel Specific Registers Memory Map Register Table Applications Information Design Guidelines Power and Ground Recommendations VCM RBIAS Reference Decoupling SPI Port Outline Dimensions Ordering Guide