Datasheet AD9652 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | 16-bit, 310 MSPS, 3.3/1.8 V Dual Analog-to-Digital Converter (ADC) |
| 页数 / 页 | 37 / 3 — AD9652. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 1/2017—Rev. A to … |
| 修订版 | C |
| 文件格式/大小 | PDF / 1.5 Mb |
| 文件语言 | 英语 |
AD9652. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 1/2017—Rev. A to Rev. B. 5/2014—Rev. 0 to Rev. A
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AD9652 Data Sheet TABLE OF CONTENTS
Features ...1 Voltage Reference .. 23 Applications...1 Clock Input Considerations ... 23 Functional Block Diagram ...1 Power Dissipation and Standby Mode ... 25 General Description ..1 Internal Background Calibration ... 25 Product Highlights ..1 Digital Outputs .. 26 Revision History ..2 ADC Overrange... 26 Specifications ...3 Fast Threshold Detection (FDA/FDB)... 28 ADC DC Specifications ...3 Serial Port Interface ... 29 ADC AC Specifications..4 Configuration Using the SPI .. 29 Digital Specifications ...5 Hardware Interface .. 29 Switching Specifications...7 Configuration Without the SPI.. 29 Timing Specifications ..7 SPI Accessible Features .. 30 Absolute Maximum Ratings ..9 Memory Map... 31 Thermal Characteristics...9 Reading the Memory Map Register Table .. 31 ESD Caution ..9 Memory Map Register Table .. 32 Pin Configuration and Function Descriptions...10 Applications Information .. 35 Typical Performance Characteristics ...13 Design Guidelines.. 35 Equivalent Circuits ..19 Outline Dimensions .. 36 Theory of Operation ..20 Ordering Guide ... 36 ADC Architecture ..20 Analog Input Considerations ...20
REVISION HISTORY 1/2017—Rev. A to Rev. B
Changes to DCO± to Data Skew (tSKEW) Parameter, Table 4 ...7 Changes to Clock Input Options Section ...24
5/2014—Rev. 0 to Rev. A
Changes to Supply Current, Clock Divider = 1 Parameter and Power Consumption, Clock Divider = 1 Parameter, Table 1 ..3
4/2014—Revision 0: Initial Version
Rev. B | Page 2 of 36 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications ADC DC Specifications ADC AC Specifications Digital Specifications Switching Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Characteristics ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Equivalent Circuits Theory of Operation ADC Architecture Analog Input Considerations Input Common Mode Common-Mode Voltage Servo Dither Large Signal Fast Fourier Transform Small Signal FFT Static Linearity Differential Input Configurations Voltage Reference Internal Reference Connection External Reference Operation Clock Input Considerations Clock Input Options Input Clock Divider Clock Duty Cycle Jitter Considerations Power Dissipation and Standby Mode Internal Background Calibration Digital Outputs Timing Data Clock Output ADC Overrange Fast Threshold Detection (FDA/FDB) Serial Port Interface Configuration Using the SPI Hardware Interface Configuration Without the SPI SPI Accessible Features Memory Map Reading the Memory Map Register Table Open and Reserved Locations Default Values Logic Levels Transfer Register Map Channel Specific Registers Memory Map Register Table Applications Information Design Guidelines Power and Ground Recommendations VCM RBIAS Reference Decoupling SPI Port Outline Dimensions Ordering Guide
AD9652 Data Sheet TABLE OF CONTENTS
Features ...1 Voltage Reference .. 23 Applications...1 Clock Input Considerations ... 23 Functional Block Diagram ...1 Power Dissipation and Standby Mode ... 25 General Description ..1 Internal Background Calibration ... 25 Product Highlights ..1 Digital Outputs .. 26 Revision History ..2 ADC Overrange... 26 Specifications ...3 Fast Threshold Detection (FDA/FDB)... 28 ADC DC Specifications ...3 Serial Port Interface ... 29 ADC AC Specifications..4 Configuration Using the SPI .. 29 Digital Specifications ...5 Hardware Interface .. 29 Switching Specifications...7 Configuration Without the SPI.. 29 Timing Specifications ..7 SPI Accessible Features .. 30 Absolute Maximum Ratings ..9 Memory Map... 31 Thermal Characteristics...9 Reading the Memory Map Register Table .. 31 ESD Caution ..9 Memory Map Register Table .. 32 Pin Configuration and Function Descriptions...10 Applications Information .. 35 Typical Performance Characteristics ...13 Design Guidelines.. 35 Equivalent Circuits ..19 Outline Dimensions .. 36 Theory of Operation ..20 Ordering Guide ... 36 ADC Architecture ..20 Analog Input Considerations ...20
REVISION HISTORY 1/2017—Rev. A to Rev. B
Changes to DCO± to Data Skew (tSKEW) Parameter, Table 4 ...7 Changes to Clock Input Options Section ...24
5/2014—Rev. 0 to Rev. A
Changes to Supply Current, Clock Divider = 1 Parameter and Power Consumption, Clock Divider = 1 Parameter, Table 1 ..3
4/2014—Revision 0: Initial Version
Rev. B | Page 2 of 36 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications ADC DC Specifications ADC AC Specifications Digital Specifications Switching Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Characteristics ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Equivalent Circuits Theory of Operation ADC Architecture Analog Input Considerations Input Common Mode Common-Mode Voltage Servo Dither Large Signal Fast Fourier Transform Small Signal FFT Static Linearity Differential Input Configurations Voltage Reference Internal Reference Connection External Reference Operation Clock Input Considerations Clock Input Options Input Clock Divider Clock Duty Cycle Jitter Considerations Power Dissipation and Standby Mode Internal Background Calibration Digital Outputs Timing Data Clock Output ADC Overrange Fast Threshold Detection (FDA/FDB) Serial Port Interface Configuration Using the SPI Hardware Interface Configuration Without the SPI SPI Accessible Features Memory Map Reading the Memory Map Register Table Open and Reserved Locations Default Values Logic Levels Transfer Register Map Channel Specific Registers Memory Map Register Table Applications Information Design Guidelines Power and Ground Recommendations VCM RBIAS Reference Decoupling SPI Port Outline Dimensions Ordering Guide