Datasheet ADN8835 (Analog Devices) - 2
| 制造商 | Analog Devices |
| 描述 | Ultracompact, 3 A Thermoelectric Cooler (TEC) Controller |
| 页数 / 页 | 27 / 2 — ADN8835. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 9/2018—Rev. A to … |
| 修订版 | B |
| 文件格式/大小 | PDF / 656 Kb |
| 文件语言 | 英语 |
ADN8835. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 9/2018—Rev. A to Rev. B. 5/2017—Rev. 0 to Rev. A
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ADN8835 Data Sheet TABLE OF CONTENTS
Features .. 1 TEC Voltage/Current Monitor ... 16 Applications ... 1 Maximum TEC Voltage Limit .. 16 Functional Block Diagram .. 1 Maximum TEC Current Limit ... 16 General Description ... 1 Applications Information .. 18 Revision History ... 2 Signal Flow .. 18 Detailed Functional Block Diagram .. 3 Thermistor Setup .. 18 Specifications ... 4 Thermistor Amplifier (Chopper 1) .. 19 Absolute Maximum Ratings .. 7 PID Compensation Amplifier (Chopper 2) .. 19 Thermal Resistance .. 7 MOSFET Driver Amplifiers .. 20 Maximum Power Dissipation ... 7 PWM Output Filter Requirements .. 20 ESD Caution .. 7 Input Capacitor Selection .. 21 Pin Configuration and Function Descriptions ... 8 Power Dissipation... 21 Typical Performance Characteristics ... 9 Thermal Consideration ... 22 Theory of Operation .. 13 PCB Layout Guidelines .. 23 Analog PID Control ... 14 Block Diagrams and Signal Flow ... 23 Digital PID Control .. 14 Guidelines for Reducing Noise and Minimizing Power Loss23 Powering the Control er .. 14 Example PCB Layout Using Two Layers ... 24 Enable and Shutdown .. 15 Outline Dimensions ... 27 Oscil ator Clock Frequency ... 15 Ordering Guide .. 27 Temperature Lock Indicator ... 15 Soft Start on Power-Up .. 15
REVISION HISTORY 9/2018—Rev. A to Rev. B
Added Patent Information ... 1 Changes to Specifications, Table 2, Voltage Measurement Accuracy Parameter ... 6
5/2017—Rev. 0 to Rev. A
Changes to PID Compensation Amplifier (Chopper 2) Section... 18 Changes to Ordering Guide .. 26
12/2016—Revision 0: Initial Version
Rev. B | Page 2 of 27 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG PID CONTROL DIGITAL PID CONTROL POWERING THE CONTROLLER ENABLE AND SHUTDOWN OSCILLATOR CLOCK FREQUENCY External Clock Operation Connecting Multiple ADN8835 Devices TEMPERATURE LOCK INDICATOR SOFT START ON POWER-UP TEC VOLTAGE/CURRENT MONITOR Voltage Monitor Current Monitor MAXIMUM TEC VOLTAGE LIMIT Using a Resistor Divider to Set the TEC Voltage Limit MAXIMUM TEC CURRENT LIMIT Using a Resistor Divider to Set the TEC Current Limit APPLICATIONS INFORMATION SIGNAL FLOW THERMISTOR SETUP THERMISTOR AMPLIFIER (CHOPPER 1) PID COMPENSATION AMPLIFIER (CHOPPER 2) MOSFET DRIVER AMPLIFIERS PWM OUTPUT FILTER REQUIREMENTS Inductor Selection Capacitor Selection INPUT CAPACITOR SELECTION POWER DISSIPATION PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Losses (PSW) Transition Losses (PTRAN) Linear Regulator Power Dissipation THERMAL CONSIDERATION PCB LAYOUT GUIDELINES BLOCK DIAGRAMS AND SIGNAL FLOW GUIDELINES FOR REDUCING NOISE AND MINIMIZING POWER LOSS General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components EXAMPLE PCB LAYOUT USING TWO LAYERS OUTLINE DIMENSIONS ORDERING GUIDE
ADN8835 Data Sheet TABLE OF CONTENTS
Features .. 1 TEC Voltage/Current Monitor ... 16 Applications ... 1 Maximum TEC Voltage Limit .. 16 Functional Block Diagram .. 1 Maximum TEC Current Limit ... 16 General Description ... 1 Applications Information .. 18 Revision History ... 2 Signal Flow .. 18 Detailed Functional Block Diagram .. 3 Thermistor Setup .. 18 Specifications ... 4 Thermistor Amplifier (Chopper 1) .. 19 Absolute Maximum Ratings .. 7 PID Compensation Amplifier (Chopper 2) .. 19 Thermal Resistance .. 7 MOSFET Driver Amplifiers .. 20 Maximum Power Dissipation ... 7 PWM Output Filter Requirements .. 20 ESD Caution .. 7 Input Capacitor Selection .. 21 Pin Configuration and Function Descriptions ... 8 Power Dissipation... 21 Typical Performance Characteristics ... 9 Thermal Consideration ... 22 Theory of Operation .. 13 PCB Layout Guidelines .. 23 Analog PID Control ... 14 Block Diagrams and Signal Flow ... 23 Digital PID Control .. 14 Guidelines for Reducing Noise and Minimizing Power Loss23 Powering the Control er .. 14 Example PCB Layout Using Two Layers ... 24 Enable and Shutdown .. 15 Outline Dimensions ... 27 Oscil ator Clock Frequency ... 15 Ordering Guide .. 27 Temperature Lock Indicator ... 15 Soft Start on Power-Up .. 15
REVISION HISTORY 9/2018—Rev. A to Rev. B
Added Patent Information ... 1 Changes to Specifications, Table 2, Voltage Measurement Accuracy Parameter ... 6
5/2017—Rev. 0 to Rev. A
Changes to PID Compensation Amplifier (Chopper 2) Section... 18 Changes to Ordering Guide .. 26
12/2016—Revision 0: Initial Version
Rev. B | Page 2 of 27 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG PID CONTROL DIGITAL PID CONTROL POWERING THE CONTROLLER ENABLE AND SHUTDOWN OSCILLATOR CLOCK FREQUENCY External Clock Operation Connecting Multiple ADN8835 Devices TEMPERATURE LOCK INDICATOR SOFT START ON POWER-UP TEC VOLTAGE/CURRENT MONITOR Voltage Monitor Current Monitor MAXIMUM TEC VOLTAGE LIMIT Using a Resistor Divider to Set the TEC Voltage Limit MAXIMUM TEC CURRENT LIMIT Using a Resistor Divider to Set the TEC Current Limit APPLICATIONS INFORMATION SIGNAL FLOW THERMISTOR SETUP THERMISTOR AMPLIFIER (CHOPPER 1) PID COMPENSATION AMPLIFIER (CHOPPER 2) MOSFET DRIVER AMPLIFIERS PWM OUTPUT FILTER REQUIREMENTS Inductor Selection Capacitor Selection INPUT CAPACITOR SELECTION POWER DISSIPATION PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Losses (PSW) Transition Losses (PTRAN) Linear Regulator Power Dissipation THERMAL CONSIDERATION PCB LAYOUT GUIDELINES BLOCK DIAGRAMS AND SIGNAL FLOW GUIDELINES FOR REDUCING NOISE AND MINIMIZING POWER LOSS General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components EXAMPLE PCB LAYOUT USING TWO LAYERS OUTLINE DIMENSIONS ORDERING GUIDE