Datasheet STGAP2SICS (STMicroelectronics) - 2

STGAP2SICS Block diagram 1 Block diagram Figure 1. Block diagram - Single output and Miller Clamp configuration
VDD VH
I
IN+
S
UVLO VH
O
Floating Level GOUT
L
Control Section Shifter
A
Control Logic Logic
T
CLAMP IN-
I O N
GNDISO Floating ground A + GND VCLAMPth
Figure 2. Block diagram - Separate output configuration
VDD VH
I
IN+
S
UVLO
O
VH Floating Level GON
L
Control Section Shifter
A
Control Logic Logic
T
GOFF IN-
I O N
GNDISO Floating ground GND
DS13402
-
Rev 1 page 2/24
Document Outline Cover image Product status link / summary Features Application Description 1 Block diagram 2 Pin description and connection diagram 3 Electrical data 3.1 Absolute maximum ratings 3.2 Thermal data 3.3 Recommended operating conditions 4 Electrical characteristics 5 Isolation 6 Functional description 6.1 Gate driving power supply and UVLO 6.2 Power-up, power-down and “safe state” 6.3 Control inputs 6.4 Miller Clamp function 6.5 Watchdog 6.6 Thermal shutdown protection 6.7 Standby function 7 Typical application diagram 8 Layout 8.1 Layout guidelines and considerations 8.2 Layout example 9 Testing and characterization information 10 Package information 10.1 SO-8W package information 10.2 SO-8W suggested land pattern 11 Ordering information Revision history Contents List of tables List of figures