Datasheet AD8422 (Analog Devices) - 2
| 制造商 | Analog Devices |
| 描述 | High Performance, Low Power, Rail-to-Rail Precision Instrumentation Amplifier |
| 页数 / 页 | 24 / 2 — AD8422. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 1/15—Rev. 0 to … |
| 修订版 | A |
| 文件格式/大小 | PDF / 655 Kb |
| 文件语言 | 英语 |
AD8422. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 1/15—Rev. 0 to Rev. A. 5/13—Revision 0: Initial Version
该数据表的模型线
文件文字版本
link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 3 link to page 5 link to page 8 link to page 8 link to page 8 link to page 9 link to page 10 link to page 19 link to page 19 link to page 19 link to page 20 link to page 20 link to page 20 link to page 21 link to page 21 link to page 22 link to page 23 link to page 23 link to page 23 link to page 24 link to page 24
AD8422 Data Sheet TABLE OF CONTENTS
Features .. 1 Architecture .. 19 Applications ... 1 Gain Selection ... 19 Connection Diagram ... 1 Reference Terminal .. 20 General Description ... 1 Input Voltage Range ... 20 Revision History ... 2 Layout .. 20 Specifications ... 3 Input Bias Current Return Path ... 21 SOIC Package .. 3 Input Voltages Beyond the Supply Rails .. 21 MSOP Package .. 5 Radio Frequency Interference (RFI) .. 22 Absolute Maximum Ratings .. 8 Applications Information .. 23 Thermal Resistance .. 8 Precision Bridge Conditioning ... 23 ESD Caution .. 8 Process Control Analog Input .. 23 Pin Configuration and Function Descriptions ... 9 Outline Dimensions ... 24 Typical Performance Characteristics ... 10 Ordering Guide .. 24 Theory of Operation .. 19
REVISION HISTORY 1/15—Rev. 0 to Rev. A
Changes to Features Section.. 1 Changes to SOIC Package Section and Table 1 .. 4 Changes to MSOP Package Section and Table 2 .. 5 Changes to Supply Voltage Parameter and ESD Parameter, Table 3 .. 8 Deleted Figure 12 and Figure 15, Renumbered Sequentially ... 11 Changes to Figure 10 to Figure 15 .. 11 Changes to Figure 16, Figure 18, and Figure 19 ... 12 Changes to Figure 23 and Figure 24 ... 13 Changes to Figure 31, Figure 32, and Figure 33 ... 14 Changes to Figure 64 .. 23
5/13—Revision 0: Initial Version
Rev. A | Page 2 of 24 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS SOIC PACKAGE MSOP PACKAGE ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION RG Power Dissipation REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies and Grounding Reference Pin INPUT BIAS CURRENT RETURN PATH INPUT VOLTAGES BEYOND THE SUPPLY RAILS Input Voltages Beyond the Maximum Ratings RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION PRECISION BRIDGE CONDITIONING PROCESS CONTROL ANALOG INPUT OUTLINE DIMENSIONS ORDERING GUIDE
AD8422 Data Sheet TABLE OF CONTENTS
Features .. 1 Architecture .. 19 Applications ... 1 Gain Selection ... 19 Connection Diagram ... 1 Reference Terminal .. 20 General Description ... 1 Input Voltage Range ... 20 Revision History ... 2 Layout .. 20 Specifications ... 3 Input Bias Current Return Path ... 21 SOIC Package .. 3 Input Voltages Beyond the Supply Rails .. 21 MSOP Package .. 5 Radio Frequency Interference (RFI) .. 22 Absolute Maximum Ratings .. 8 Applications Information .. 23 Thermal Resistance .. 8 Precision Bridge Conditioning ... 23 ESD Caution .. 8 Process Control Analog Input .. 23 Pin Configuration and Function Descriptions ... 9 Outline Dimensions ... 24 Typical Performance Characteristics ... 10 Ordering Guide .. 24 Theory of Operation .. 19
REVISION HISTORY 1/15—Rev. 0 to Rev. A
Changes to Features Section.. 1 Changes to SOIC Package Section and Table 1 .. 4 Changes to MSOP Package Section and Table 2 .. 5 Changes to Supply Voltage Parameter and ESD Parameter, Table 3 .. 8 Deleted Figure 12 and Figure 15, Renumbered Sequentially ... 11 Changes to Figure 10 to Figure 15 .. 11 Changes to Figure 16, Figure 18, and Figure 19 ... 12 Changes to Figure 23 and Figure 24 ... 13 Changes to Figure 31, Figure 32, and Figure 33 ... 14 Changes to Figure 64 .. 23
5/13—Revision 0: Initial Version
Rev. A | Page 2 of 24 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS SOIC PACKAGE MSOP PACKAGE ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION RG Power Dissipation REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies and Grounding Reference Pin INPUT BIAS CURRENT RETURN PATH INPUT VOLTAGES BEYOND THE SUPPLY RAILS Input Voltages Beyond the Maximum Ratings RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION PRECISION BRIDGE CONDITIONING PROCESS CONTROL ANALOG INPUT OUTLINE DIMENSIONS ORDERING GUIDE